Thursday, December 12, 2024 12pm to 1pm
About this Event
301 W. 16th St., Rolla, MO 65409
Yifan Ding, a doctoral candidate in electrical engineering, will defend their dissertation titled “Power Supply Induced Jitter Analysis in High-speed Drivers.” Their advisor, Dr. James Drewniak, is emeritus professor in electrical and computer engineering. The dissertation abstract is provided below.
The input/output buffer information specification (IBIS) model exhibits limitations in accurately accounting for power-supply-induced jitter (PSIJ), particularly under nonlinear and time-varying power noise conditions when there are pre-driver stages exists in the model. This work presents a series of advancements in IBIS model modification algorithms to address these limitations and enhance the PSIJ simulation accuracy for high-speed drivers.
First, a modification algorithm was developed by incorporating the pre-driver DC jitter sensitivity. This DC jitter sensitivity was used to adjust the IBIS switching coefficients Ku and Kd through two fitted correction coefficients. This approach enabled accurate characterization of pre-driver propagation delay and significantly improved the robustness of the IBIS model under DC and AC power noise. However, as power noise amplitude increased, the correction coefficients began to dominate the switching coefficients, resulting in abnormal coefficient shapes and a subsequent failure in maintaining model accuracy.
Building on this, a more straightforward modification algorithm was proposed to address nonlinear PSIJ effects. This algorithm bypassed the use of correction coefficients by directly correlating switching coefficient transitions and output edge behavior with jitter effects. By avoiding the complexity of fitted corrections, the new model achieved enhanced accuracy in output waveform prediction and jitter estimation across a range of noise scenarios, including DC, AC, and multitone noise. Despite its advantages, this approach could not accurately capture the slew rate of output waveforms due to limitations in how the algorithm was implemented.
To overcome this issue, a novel enhancement was introduced to improve slew rate characterization by addressing the constraints of non-power-aware IBIS models, which lack a ratio modification coefficient. The enhanced algorithm incorporated ratio modification to adjust switching coefficients, ensuring the correct slope of the output waveform. However, applying the ratio modification directly introduced additional output timing differences, which could degrade model accuracy. To mitigate this, the algorithm included a time difference correction by correlating the output slope adjustment with the timing offset introduced. This combined approach compensated for timing discrepancies while preserving accurate slew rate characterization. The resulting model demonstrated superior performance in jitter prediction, output waveform characterization, and overall robustness under diverse power noise conditions.
The proposed algorithm was formalized into a Buffer Issue Resolution Document (BIRD) and submitted to the IBIS community for review. Beyond the algorithm itself, the document provided comprehensive guidelines for practical implementation, including recommended driver types, load and terminal conditions, and potential keyword conflicts. These contributions aim to integrate the enhanced algorithm into the next IBIS standard revision, advancing the field of high-accuracy signal integrity simulations.
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